PLC Developers Guide / PLC I/O Mode Control / PLC Inputs for PLC I/O Mode /
Port Inputs
ConveyLinx-Ai Family |
ConveyLinx ERSC ❌ | ConveyLinx-Ai 24V ✅ | ConveyLinx-Ai 48V ✅ |
ConveyLinx-ECO ❌ | ZPA Mode ❌ | PLC I/O Mode ✅ | |
Register Name | Internal Address | Assembled PLC Address | Description | ||
Sensor Port Inputs | 4:0035 | M: 4:1701 E: I.Data [1] P: Byte 2 (Hi) P: Byte 3 (Lo) |
Bitwise Value | ||
bit 00 = | Left Sensor Port – Aux I/O (M8 Pin 2) | ||||
bit 02 = | Right Sensor Port – Aux I/O (M8 Pin 2) | ||||
bit 04 = | Left Sensor Port – Sensor Signal (M8 Pin 4) | ||||
bit 06 = | Right Sensor Port – Sensor Signal (M8 Pin 4) | ||||
bit 15 = | 2 sec ON / 2 sec OFF heartbeat | ||||
All other bits reserved |
ConveyLinx-ERSC Family |
ConveyLinx ERSC ✅ | ConveyLinx-Ai 24V ❌ | ConveyLinx-Ai 48V ❌ |
ConveyLinx-ECO ❌ | ZPA Mode ❌ | PLC I/O Mode ✅ | |
Register Name | Internal Address | Assembled PLC Address | Description | ||
Sensor & Control Port Inputs | 4:0035 | M: 4:1701 E: I.Data [1] P: Byte 2 (Hi) P: Byte 3 (Lo) |
Bitwise Value | ||
bit 00 = | Left Sensor Port – Pin 3 | ||||
bit 01 = | Left Control Port – Pin 3 | ||||
bit 02 = | Right Sensor Port – Pin 3 | ||||
bit 03 = | Right Control Port – Pin 3 | ||||
bit 04 = | Left Sensor Port – Pin 4 | ||||
bit 05 = | Left Control Port – Pin 4 | ||||
bit 06 = | Right Sensor Port – Pin 4 | ||||
bit 07 = | Right Control Port – Pin 4 | ||||
bit 15 = | 2 sec ON / 2 sec OFF heartbeat | ||||
All other bits reserved |
ConveyLinx-ECO |
ConveyLinx ERSC ❌ | ConveyLinx-Ai 24V ❌ | ConveyLinx-Ai 48V ❌ |
ConveyLinx-ECO ✅ | ZPA Mode ❌ | PLC I/O Mode ✅ | |
Register Name | Internal Address | Assembled PLC Address | Description | ||
Sensor Port Inputs | 4:0035 | M: 4:1701 E: I.Data [1] P: Byte 2 (Hi) P: Byte 3 (Lo) |
Bitwise Value | ||
bit 00 = | Left AUX (Left Terminal Pin 4) | ||||
bit 02 = | Right AUX (Right Terminal Pin 4) | ||||
bit 04 = | Left SEN (Left Terminal Pin 2) | ||||
bit 06 = | Right SEN (Right Terminal Pin 2) | ||||
bit 15 = | 2 sec ON / 2 sec OFF heartbeat | ||||
All other bits reserved |